SKY130 and its standard cells

The manufacturing process the lab builds for: what it is, what it offers and what it does not.

EngineerStudent 2 min read · Updated 2026-10-05

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        What it isStandard cellsWhat the lab's flow supportsWhat costs area and timeTiming cornersLearn more
      

A chip is designed for one manufacturing process. The files that describe a process to the design tools are its process design kit, or PDK. SKY130 is the lab's original process, built with the open SkyWater sky130A PDK. The lab also builds for other processes: see Supported processes.

What it is#

A 130 nanometre CMOS process, released as open source.
A nominal core supply of 1.8 volts.
Wiring on a local-interconnect layer and five metal layers above it.

The routing layers of sky130, seen from the side. Each layer runs mainly in one direction; vias, in dark, join one layer to the next.

A 130 nanometre process is mature. It is not what a modern phone processor uses, and it is ideal for learning: the rules are public, the tools are open, and designs made for it have been manufactured many times.

Standard cells#

The build uses the sky130_fd_sc_hd library: the high-density standard cells. A standard cell is a ready-made logic element, such as an inverter, a NAND gate or a flip-flop. All cells have the same height, so they line up in rows.

What the lab's flow supports#

Supported	Not supported
Digital logic built from standard cells	Analog circuits
One clock	Clock generators and several clock domains
Storage in flip-flops	Memory macros. An array becomes flip-flops
Digital pins on the die edge	Pads and several supplies

What costs area and time#

Area: wide registers, arrays and multipliers. Every stored bit is a flip-flop.
Time: wide multipliers and long chains of adders in a single clock cycle.

For scale, one design measured in this lab: a signed 8-bit multiply-accumulate was 2,220 cells in a die of 0.09 square millimetres, and met timing. Your own design's numbers come from its own build.

Timing corners#

The build checks timing at several corners of process, voltage and temperature, and its report names them. See Timing explained.

Learn more#

The process is documented publicly by the SkyWater open-source PDK project. Searching for "SkyWater sky130 PDK documentation" finds the design rules and cell libraries.

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