Routing
Drawing the metal wires that join the cells, on several layers, without breaking a rule.
After placement every cell has a position, and nothing is connected. Routing draws the wires.
Layers#
Wires are drawn in metal on layers stacked above the cells. Each layer prefers one direction, horizontal or vertical, alternating as you go up. A connection that must turn a corner changes layer through a via. The sky130 process has a local-interconnect layer and five metal layers.
Two passes#
- Global routing divides the die into a grid and plans roughly which cells of the grid each wire passes through. It reveals congestion: regions asked to carry more wires than fit.
- Detailed routing draws the exact shapes, obeying the process's rules for width and spacing.
Antennas#
During manufacturing, a long wire connected to a transistor's gate can collect charge and damage it. The tool finds these cases and fixes them by breaking the wire across layers or adding a small diode. The starters switch this protection on.
After routing#
With the real wires known, their resistance and capacitance are extracted, and timing is measured for the last time. See Timing analysis.
In this lab#
The Routing phase of the build card covers global routing, antenna repair, detailed routing and the checks for unconnected pins and wire length.
Common failures#
| Symptom | Cause | What to do |
|---|---|---|
| Congestion, or detailed routing does not converge | Too many wires for the area | A larger die |
| Routing violations remain | The tool ran out of room near a crowded region | A larger die, or a lower placement density |
| Antenna violations remain | A long wire the tool could not repair | Ask nelix ai antenna to read the result |
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