What a PDK contains
The files a factory provides so that design tools can target its process.
A chip factory, or foundry, can make shapes on silicon within certain limits, and its transistors behave in certain ways. A process design kit, or PDK, is how the foundry describes all of that to design tools. Without it, a tool knows nothing about the process it is designing for.
What is in one#
| Part | What it tells the tools |
|---|---|
| Layer definitions | Which layers exist, their names and order: the metals, the vias, the transistor layers |
| Design rules | The limits on shapes: minimum widths, spacings and overlaps |
| Device models | How a transistor behaves electrically, for circuit simulation |
| Standard-cell libraries | Ready-made logic gates: their layouts, timing, power and pin positions |
| Input and output cells | Pads and protection circuits that connect the chip to the outside |
| Technology files | The same information in the format each tool reads |
| Rule decks | The scripts that checking tools run for DRC and LVS |
Who uses which part#
| Stage | Uses |
|---|---|
| Synthesis | The timing of each standard cell |
| Placement and routing | The physical outline of each cell, the layers, and the routing rules |
| Timing analysis | Cell timing at each corner, and how much the wires slow signals |
| DRC and LVS | The rule decks |
A PDK is tied to one process#
A design built for one PDK cannot simply be manufactured on another. The cells, the rules and the timing are all different. Moving a design means running the back end again.
Open and closed#
Most PDKs are confidential and available only under agreement with the foundry. A few are open. This lab uses an open one, which is why you can read every rule and every cell. See SKY130 and its standard cells and Licensing and access.
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