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cocotb

The Python test framework behind every test in the lab, and the version-specific details that matter.

EngineerStudent 1 min read · Updated 2026-10-05

On this page In this labThings that changed in cocotb 2Triggers you will useReading the resultThe lab's restrictions

cocotb lets you write a testbench in Python. Your design runs in a simulator; cocotb connects Python to it, so a test can set inputs, wait for clock edges and read outputs.

In this lab#

Version2.1.0
Python3.12
SimulatorIcarus Verilog 12.0
Test filetb/test_top.py
Started byThe project's Makefile, through nelix test

The starter's Makefile sets the pieces: TOPLEVEL = top, COCOTB_TEST_MODULES = test_top, and the source rtl/top.sv.

Things that changed in cocotb 2#

Code written for cocotb 1 often fails here. These are the differences that matter.

cocotb 1cocotb 2, as used here
Clock(dut.clk, 10, units="ns")Clock(dut.clk, 10, unit="ns")
dut.x.value.signed_integerdut.x.value.to_signed()
dut.x.value.integerint(dut.x.value)
cocotb.fork(...)cocotb.start_soon(...)

Triggers you will use#

TriggerWaits for
RisingEdge(dut.clk)The clock going from 0 to 1
FallingEdge(dut.clk)The clock going from 1 to 0
ClockCycles(dut.clk, 5)Five clock edges
Timer(20, unit="ns")A length of simulated time
ReadOnly()The end of the current moment, when all values have settled. Nothing may be driven until another trigger has passed

Reading the result#

text
** TESTS=1 PASS=1 FAIL=0 SKIP=0 **

A failed assert prints its message and counts as FAIL=1:

text
AssertionError: subtract 255, 1: expected 254, saw 0

The lab's restrictions#

A test may import only cocotb, cocotb.clock, cocotb.triggers and random. This keeps a test from touching anything outside the simulation.

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