What is Nelix Silicon Lab
A chip design lab that runs in your browser, with an AI engineer beside you at every step.
Nelix Silicon Lab takes a digital design from an idea to a chip layout. You write or describe the design, test it, turn it into logic gates, and place and route those gates into a layout you can look at. Nothing is installed on your computer. The tools run on the Nelix server and you work in a web browser.
What you can do#
- Design. Write SystemVerilog yourself, or describe what you want and let Nelix Agent draft it with you.
- Simulate. Run a test against the design and open the waveform to see every signal.
- Synthesize. Turn the code into logic gates and view the schematic.
- Build the chip. Place and route the gates into a real layout for the SkyWater sky130A process.
- Understand. When a run fails, the lab shows what failed and the evidence, and Nelix Agent can diagnose it.
- Share. Publish a page with a picture of your layout and its measured results.
Who it is for#
| You are | Start with |
|---|---|
| A student, new to chips | Your first chip, then From idea to layout |
| An engineer | Projects, Build settings and the RTL coding standard |
| A developer or educator | How the agents are configured and Architecture |
How it differs from a chat assistant#
A general assistant writes code and stops. The lab runs that code through real tools and shows you measured results: a passing test, a cell count, a timing margin, a layout. Nelix Agent is held to those results. It cannot state a number the tools did not measure.
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