Reference

Commands, files, settings, job states, artefacts and limits, exactly as implemented.

• CLI commandsEvery nelix command as the tool itself lists it, grouped by what it is for.
• Project structureEvery file in a project, what it is for, and which ones must stay where they are.
• Configuration filesThe actual fields of openlane/config.json, config/project.toml and constraints/clock.sdc, with the values a starter ships with.
• Job statesEvery state a run can be in, what it means, and what you can do in it.
• Artefacts and reportsThe files each stage produces, their formats, and how to open them.
• Compute limitsHow long each stage may run, how much memory it has, and how many can run at once.
• Platform architectureThe parts of the lab and what each is responsible for.
• How runs are isolatedWhat separates one person's work from another's, and one run from the server.
• GlossaryThe words used in chip design and in this lab, in plain language.
• Reference checks and release gateThe known-bad designs the lab rebuilds to prove its tools still catch faults, what each must show per process, and the automated tests behind the roles, grading, learning-mode and isolation promises.
• Build provenance, CI runs and licence noticesThe full input fingerprint of a chip build, the rebuild-from-bundle script, LICENSES/ in every download, saved comparisons and the admin CI command with its exit codes.